1. Field of Invention
The present disclosure relates to low-k dielectrics. More particularly, the present disclosure relates to a non-crystalline dielectric layer having a dielectric constant of less than 2.
2. Description of Related Art
Nowadays a semiconductor device is highly integrated, and as the clearance between the metal wiring layers of the semiconductor device becomes smaller, the parasitic capacitance between the metal wirings becomes larger, which may lead to some disadvantages such as a delay in a response speed or an increase in the power consumption. To overcome these problems, a low-k dielectric of less than 2 is required to decrease the parasitic capacitance between the metal wirings.
The low-k dielectric also needs to possess sufficient hardness and high elastic modulus, so as to endure the process conditions during the manufacturing process. In general, it requires a hardness of greater than 1 GPa and an elastic modulus of greater than 10 GPa.
Cho et al. disclosed a dielectric layer having a dielectric constant of 1.95, hardness of 1.1 GPa and an elastic modulus of 17.7 GPa (Thin Solid Films, 483, 283-286, 2005). A post-treatment using ozone was employed in this technology to improve the properties of dielectric layer. However, it requires application of an ozone gas at a high temperature of 300° C., and thus leading to a safety concern.
Another method of forming a low-k dielectrics has been reported by Ha et al. (Ceram. Int., 34, 947-951, 2008). In this technology, tetraethylorthosilicate (TEOS) and Methyltriethoxysilane (MTES) are used as silicate sources, and the dielectric constant of the low-k dielectrics is 2.32, which is still greater than 2.
Tsai et al. provided a method of forming a dielectric layer as well (Thin Solid Films, 517, 2039-2043, 2009). In this research, the dielectric constant and elastic modulus exhibit a trade-off. A dielectric constant of less than 2 and modulus of elasticity of greater than 10 GPa may not simultaneously be satisfied.
U.S. Pat. No. 7,384,622 disclosed a dielectric layer having a zeolite structure. This technology exhibits a satisfactory result in the both the dielectric constant and modulus of elasticity. However, it requires a long period of time of 5-7 days to complete the whole process.
In view of the above, there exists in this art a need of an improved method for forming a low-k layer, which would resolve the above mentioned issues.